1. Filed of the Invention
The present invention relates to a data receiving apparatus, a demodulator and an integrated circuit, and is applicable, for example, to a portable message receiver for receiving data sent by radio and displaying a message.
2. Description of the Rrelated Art
So far, this type of portable message receiver, so-called pager, has received message data transmitted by two-valued FSK (Frequency Shift Keying), generated a ring back tone and displayed a message. On the other hand, together with a speed-up in the modulating speed of message data, by adopting a multi-valued, four- or more-valued, FSK instead of two-valued FSK, a large capacity of message data can be transmitted.
The scheme for receiving message data transmitted by this four-valued FSK is still at the stage of introduction. For this reason, among portable message receivers for receiving message data sent by 4-valued FSK, there was a receiver used in combination of a conventionally employed intermediate frequency integrated circuit and detector integrated circuit with an analog-digital convertor.
That is, as shown in FIG. 1, a portable message receiver 1 gives a high-frequency input signal S1 obtained from the antenna 2 to the high-frequency section 3 and gives the high-frequency signal S2 tuned, amplified and automatically gain-controlled to the intermediate frequency section 4. The intermediate frequency section 4 converts a high-frequency signal S2 into an intermediate frequency signal by using the local oscillation signal and gives the 4-valued analog signal S3 obtained by detection to the analog-to-digital convertor (in FIG. 1, designated with A/D) 5.
The analog-to-digital convertor 5 converts the 4-valued analog signal S3 into 8-bit digital data S4 and gives them to the decoder 6. The decoder 6 makes up the digital data S4 into a binary data string, gives the message data S5 obtained from this binary data string to the display section 7 and has a message displayed in alphabetic or numeric characters.
Incidentally, the frequency shift keying is one type of frequency modulation scheme, in which individual frequencies are allotted to marks and spaces of the digital signal to be sent and sends out digital signal while switching the frequency.
Before converting a 4-valued analog signal S3 into 8-bit digital signal S4, the analog-to-digital convertor 5 judges the level and converts the analog signal S3 into a 2-bit digital signal. At this time, the analog-to-digital convertor 5 judges the level of four types of analog signals S3 as 00, 01, 11 and 10 in sequence from the lowest side by using three threshold values mutually different in potential.
Meanwhile, in an analog signal S3, a DC offset, such as frequency drift of the oscillator in the intermediate frequency section 4, due to a temperature fluctuation of the receiving system arises. From the need for canceling the influence of this offset, a correction circuit for processing the digital data S4 with a complicated correction algorithm is constructed in the decoder 6.
However, by processing a 4-valued analog signal S3 in the analog-to-digital convertor 5, a greater amount of consumed power is required by the portion consumed for the analog-to-digital convertor 5. Accordingly, there was a problem that this excess power consumption forms a great factor in preventing the most important long-life operation for a portable message receiver.
In addition, adopting the arrangement that the DC offset is canceled after the analog-to-digital conversion leads to an enlargement of circuit scale, so that the consumed power is increased correspondingly. Furthermore, because the reference level employed in judging the level cannot be made variable, there was disadvantage of being weak for or not flexibly coping with troubles very highly possible, such as level lowering due to a rapid and abrupt change in electric field intensity or fluctuation of DC component due to a fading.